Mixed HDL and schematic entry leverages topdown methods that best
meet design needs
Graphical state machine entry automatically produces error free,
synthesizable VHDL, Verilog, or ABEL code, saving HDL entry time
Language sensitive color-coded editor supports code writing/tracking capabilities
Hierarchy Navigator uses on-line connectivity database enabling rapid multi-layer
traversing and tracing - simplifying net, symbol, component, and block
queries
Device independent library makes retargetting new architectures as simple
as a click of a button
Library manager provides easy manipulation of library elements with
search, view, add, delete, and modify commands
Project Navigator automatically reconfigures design flows when new device
architectures are chosen, increasing design productivity
Project Notebook organizes design files for easy project management
Engineering Capture System (ECS)
Topdown block diagram or traditional schematic entry leverages methods
that best meet design needs
Language sensitive color-coded editor supports code writing/tracking capabilities
Hierarchy Navigator uses on-line connectivity database enabling multi-layer
traversing and tracing - simplifying net, symbol, component, and block queries
Online connectivity database ensures integrity at all levels of design or hierarchy
Extensive parts library featuring over 30,000 functions offers broad range
support for board entry tasks
Simulation netlisters allow VHDL or Verilog functional verification between
sub-modules, increasing first time success - while reducing design iterations
SPICE netlisters easily export to, and back annotate from, third-party
mixed-signal and analog tools
Bill of material generation and schematic updating facilitates preparation
of schematic files for targeted PCB layout tools
Built-in interfaces forward and back annotate design information in EDIF or
PCB layout formats, offering board implementation flexibility
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